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      Circuit Protection of USB 2.0
      Publish:Shenzhen Tergy Technology Co., Ltd.  Time:2016-12-07

      Circuit Protection of USB 2.0
      Solution:

      Circuit Protection of USB 2.0
      Circuit Protection of USB 2.0

      Design description:
      Protection application:
      The data signal using the USB 2 port is changed to + 0.5V, with the maximum data rate of 480Mbps.
      The arrival rate of data transmission, should minimize the amount of capacitance suppressor.
      Signal lines that need to be protected from ESD are D + and D. At the same time, it is necessary to prevent the 5VDC power bus from the ESD protection and over current hazards.

      Solution description:
      On the left, the data line can be prevented from transient voltages, through a series of TG devices. As low as possible clamp voltage (low dynamic resistance), TG TVS (SPA) diode array equipment should use the lowest possible capacitance; Littlfuse PulseGuard (PGB) equipment should be used:
      (1) two channel silicon TVS diode array (SPA) solution (sp3003 series display)
      The solution polymerization of PulseGuard B) one or two channel suppressor (pgb102st23 device)
      C solution) discrete polymerization PulseGuard suppressor (pgb1010402 double or 0603 equipment)

      Matching solutions:
      Suggestions for other protection solutions. For power bus reset 1206l series PTC is advised to flow protection, ESD protection for transient voltage suppression and MLA series multilayer.

      Regulatory issues:
      61000-4-2 ESD IEC protection device hazards through the test can prove that the end product is not easy to be the most suitable standard specification for this interface.

      Characteristic:
      not applicable.

      Application warning: not applicable.


      From the electronic related article:

        USB 3 ESD protection circuit

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      亲近乱子伦免费视频中文字幕
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